03 · Writing
Engineering Notes
~1165 min of readingDeep dives into systems, ML, and data engineering. Search, filter, or browse.
Deep Dives
longest readsRange as a Key: Why Cloud Block Store Indexes Are a Memory Problem
vAttention: Dynamic KV Cache Allocation Without Breaking Virtual Contiguity
Semantic Operators: Putting a Statistical Contract on 6 Million LLM Calls
Merkle Tree Certificates: Making Post-Quantum WebPKI Fit in the Initial Congestion Window
Latest
newest firstSep 2, 2026
Range as a Key: Why Cloud Block Store Indexes Are a Memory Problem
A cloud block store has to answer one question on every I/O: where does logical block N physically live? Answering it per-block costs gigabytes of DRAM per terabyte of attached capacity, and that DRAM is the real cost center of the storage fleet. RASK argues the fix is to stop indexing blocks and index ranges instead, which sounds trivial until you hit overlapping writes and fragmentation. Here is the design, plus my own simulation of where the memory actually goes.
Sep 1, 2026
Prism: Symbolic Superoptimization, or How to Not Decide Things Yet
Tensor-program superoptimizers die on a product search space: graph structures × tensor-partition mappings × tile sizes. Prism symbolizes the last two factors so the generator never enumerates them. I rebuilt the mapping space by brute force to see where the win actually comes from — and it is a very large constant, not a smaller exponent.
Aug 31, 2026
The Checkpoint Tax at 16k GPUs: Daly's Formula Stopped Working
Every systems course teaches the Young/Daly optimal checkpoint interval. A wave of 2025-2026 LLM training papers quietly ignores it and checkpoints far more often than the formula allows. I simulated why, then verified the trick that makes it safe — torn snapshots repaired by replaying the optimizer on the host — and found a 1.9x traffic reduction the papers leave on the table.
Aug 31, 2026
Turboshaft: V8 Walked Away From the Sea of Nodes
For twenty years the sea of nodes was the received wisdom for optimizing compilers. V8 finished replacing it with a CFG-based IR and halved compile time. I tried to reproduce the two mechanical arguments — traversal order and memory locality — and only one of them survives in isolation.
All Posts
by dateSep 2, 2026
Range as a Key: Why Cloud Block Store Indexes Are a Memory Problem
A cloud block store has to answer one question on every I/O: where does logical block N physically live? Answering it per-block costs gigabytes of DRAM per terabyte of attached capacity, and that DRAM is the real cost center of the storage fleet. RASK argues the fix is to stop indexing blocks and index ranges instead, which sounds trivial until you hit overlapping writes and fragmentation. Here is the design, plus my own simulation of where the memory actually goes.
Aug 31, 2026
The Checkpoint Tax at 16k GPUs: Daly's Formula Stopped Working
Every systems course teaches the Young/Daly optimal checkpoint interval. A wave of 2025-2026 LLM training papers quietly ignores it and checkpoints far more often than the formula allows. I simulated why, then verified the trick that makes it safe — torn snapshots repaired by replaying the optimizer on the host — and found a 1.9x traffic reduction the papers leave on the table.
Aug 31, 2026
Turboshaft: V8 Walked Away From the Sea of Nodes
For twenty years the sea of nodes was the received wisdom for optimizing compilers. V8 finished replacing it with a CFG-based IR and halved compile time. I tried to reproduce the two mechanical arguments — traversal order and memory locality — and only one of them survives in isolation.
Aug 27, 2026
Fair Queueing for LLM Serving: Why the Virtual Token Counter Needs a Lift Rule
Requests-per-minute limits are the industry's fairness mechanism, and they are terrible: to get a tighter fairness gap than a proper fair scheduler, my simulation had to throw away 78% of the GPU. VTC (OSDI '24) ports weighted fair queueing to continuous batching, and the part that matters is not the counter — it is the one line that erases a returning client's banked credit. Without it, an idle client comes back and takes 83.5% of the machine.
Aug 27, 2026
mold: What It Takes to Parallelize a Linker (and Why Nobody Did)
Linking is the last stage of the build that refuses to use your machine. lld sits on roughly one core for four of the five seconds it takes to link Firefox. The reason is not that the work is inherently sequential — it is that archive semantics are defined as a left-to-right scan, so parallelizing symbol resolution changes which object files end up in your binary. mold's answer is to replace the scan with a reachability walk, and I reproduced both the win and the corner-case divergence it causes.
Aug 27, 2026
The Move Structure: What Actually Makes a BWT-Runs Index Fast
Nishimoto and Tabei's move structure turns LF mapping on a run-length BWT from a predecessor search into a pointer dereference plus a short local scan, and the theory is about bounding that scan. I built the whole thing and measured it: the balancing that bounds the scan cost 4.5% more intervals and improved throughput by nothing. The pointer is the entire win — 1.05 cache lines per LF step versus 4.01 and climbing.
Aug 27, 2026
Software-Defined Prefetching: Steering the Hardware Prefetcher With One PTE Bit
On datacenter workloads, hardware prefetchers run at 24% accuracy — the useless prefetches are 44% of all DRAM traffic. Themis fixes this not with a smarter predictor but with a page-table bit: profile which 4KB pages are prefetch-hostile, mark them in the PTE, and let the prefetcher read the hint off the TLB. I checked the paper's arithmetic, derived where its magic constant comes from, and found the failure mode it never mentions — huge pages.
Aug 26, 2026
Multi-Size THP: Escaping the 4K-or-2M Cliff in Linux Memory Management
For twenty years Linux gave you two page sizes: 4K, or a 2M hugepage that inflates a lightly-touched heap by up to 100x. Multi-size THP fills in the orders between them — and on arm64, the contiguous PTE bit turns 16 page table entries into one TLB entry. The interesting engineering is in the access/dirty bits.
Aug 26, 2026
Polonius Alpha: Location-Sensitive Borrow Checking and the Loan-Reachability Graph
Rust's borrow checker rejects a whole class of programs that are obviously sound, and it has done so since 2018 by design. The reason is not the ownership rules; it is that NLL's constraint graph forgets where each constraint came from. Polonius alpha puts that coordinate back by making loan liveness a reachability question over a combined subset-plus-CFG graph — and it is now on nightly with a stabilization goal for 2026.
Aug 26, 2026
Tristate Numbers: The Abstract Domain That Decides Whether Your eBPF Program Loads
The eBPF verifier tracks your registers bit by bit in a domain called tnums. Multiplication in that domain was replaced upstream in August 2025, and the commit message quietly admits the new version is sometimes less precise. I enumerated all 43 million 8-bit operand pairs to find out where.