Topic
Systems & Infra
Systems programming, Linux kernel internals, io_uring, memory management, CPU architecture, SIMD, CXL memory pooling, and datacenter hardware. Performance-critical engineering at the metal.
14 posts · ~95 min of reading
Jul 8, 2026
Bw-Tree: Lock-Free B+ Trees for Multi-Core Database Scalability
How the Bw-Tree achieves latch-free concurrent access to B+ tree indexes through delta chains, an indirection mapping table, and epoch-based garbage collection, enabling linear scalability on modern many-core hardware.
Jul 8, 2026
CXL 3.1 Memory Pooling: Disaggregated Memory and the End of Stranded DRAM
How CXL 3.1 fabric-attached memory eliminates stranded DRAM across server fleets, enabling dynamic memory composition with sub-200ns additional latency through hardware-coherent interconnects.
Jul 8, 2026
Epoch-Based Reclamation: How Lock-Free Data Structures Safely Free Memory
Exploring epoch-based reclamation (EBR), the technique that lets lock-free data structures deallocate memory without garbage collection, from the foundational quiescent-state mechanism through Crossbeam's production implementation to recent advances like PEBR and Hyaline.
Jul 8, 2026
io_uring and Submission Queue Polling: The Path to Zero-Syscall I/O
How io_uring eliminated the system call overhead that plagued Linux I/O for decades, and why submission queue polling lets the kernel do I/O without ever context-switching.
Jul 8, 2026
Multi-Gen LRU: How Linux Reinvented Page Replacement After Two Decades
Linux's legacy page reclaim scanned the entire active list to find cold pages. Multi-Gen LRU replaces that O(n) scan with generation-based aging — cutting memory-pressure stalls by 40% in real workloads.
Jul 8, 2026
PGM-Index: How Piecewise Linear Models Replace B-Trees with O(log log n) Lookups
The Piecewise Geometric Model index uses linear regression segments to predict key positions, achieving O(log log n) point queries with orders-of-magnitude less space than B-trees. Here's the theory, the recursive structure, and why production systems are starting to care.
Jul 8, 2026
RadixAttention: Prefix-Aware KV Cache Reuse for 10x LLM Serving Throughput
How SGLang's RadixAttention uses a radix tree to automatically detect and reuse shared prefixes in KV caches, eliminating redundant computation and achieving up to 10x throughput gains for multi-turn LLM workloads.
Jul 8, 2026
Roaring Bitmaps: Compressed Set Operations in Constant Time Per Container
How Roaring Bitmaps achieve intersection, union, and cardinality on billion-element sets in microseconds by partitioning integers into typed containers, each optimized for its density regime, and accelerated with SIMD vectorization.
Jul 8, 2026
sched_ext: BPF-Pluggable CPU Schedulers and the End of One-Size-Fits-All Scheduling
Linux 6.12 merged sched_ext, a framework that lets you write CPU scheduler policies as BPF programs, load them at runtime, and swap them without rebooting. Here's how it works, why it matters, and what Meta learned running it in production.
Jul 8, 2026
Swiss Tables: How SIMD Rewrote the Rules of Hash Map Design
Flat hash maps based on Swiss Table design now dominate C++, Rust, Go, and Zig standard libraries. The key insight is not a better hash function or collision strategy, it is using SIMD to probe 16 slots in a single instruction, turning the control byte array into a hardware-accelerated Bloom filter.
Jul 8, 2026
Vectorized Execution: How DuckDB Processes a Billion Rows Per Second on a Laptop
Push-based pipelines, morsel-driven parallelism, and selection vectors: the three architectural bets that let an in-process database saturate modern hardware without a cluster.
Jul 6, 2026
EAGLE-3: Why the Best Draft Models Stopped Predicting Features
EAGLE-3 gets up to 6.5x decoding speedup by abandoning the feature-prediction objective that defined its predecessors. The interesting part is why feature prediction became the bottleneck, and how a trick called training-time test fixes the train/inference mismatch it leaves behind.
Jul 5, 2026
Two Workloads in a Trench Coat: Prefill/Decode Disaggregation in LLM Serving
Prefill and decode have opposite hardware profiles, and serving them on the same GPUs wastes both. A practical tour of DistServe and Mooncake, the two papers behind the biggest architecture shift in LLM inference.
Jul 5, 2026
SIEVE: The Cache Eviction Algorithm That Beats LRU by Doing Less
A 2024 NSDI paper showed that a FIFO queue, one bit per object, and a lazy hand pointer can out-perform LRU, ARC, and friends on web workloads, while removing the lock that makes LRU a scalability bottleneck. Here is how SIEVE works and why its simplicity is the whole point.